Ayar Labs

Mark Wade earned a Ph.D. in electrical engineering from the University of Colorado Boulder and bachelor's degrees in physics and electrical engineering from Louisiana Tech University. Prior to co-founding Ayar Labs, he led the team that designed the optics for the world’s first processor to communicate using light as part of research collaborations involving MIT and UC Berkeley between 2010 and 2015.

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Alex Wright-Gladstein earned an MBA from the MIT Sloan School of Management and a BA in political science and economics from Tufts University. She is the founder and CEO of Sphere, a company focused on climate-aligned investing that channels 401(k) funds away from fossil fuels, and previously held roles supporting cleantech commercialization efforts.

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Vladimir Stojanovic earned a Ph.D. in electrical engineering from Stanford University in 2005, an M.S. from Stanford, and a Dipl. Ing. from the University of Belgrade. He previously served as an associate professor of electrical engineering and computer sciences at UC Berkeley, worked at Rambus on high-speed link technology, and co-founded companies including NanoSemi (acquired by MaxLinear) and Numericcal.

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Chen Sun earned a Ph.D. and M.S. in electrical engineering and computer science from MIT and a B.S. from UC Berkeley. Prior to co-founding Ayar Labs, he conducted graduate research in photonics at MIT and UC Berkeley and completed internships at NVIDIA and Rambus, gaining experience in ASIC design and integrated photonics.

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Milos Popovic earned a Ph.D. in electrical engineering and computer science from MIT. He is an associate professor of electrical and computer engineering at Boston University and previously led research at the University of Colorado Boulder lab focused on silicon photonics and electronic-photonic integration; he was elected a National Academy of Inventors Fellow in 2023.

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Rajeev Ram earned a Ph.D. from the University of California, Santa Barbara as a Hertz Fellow after attending Caltech. He is a professor of electrical engineering at MIT leading the Physical Optics and Electronics Group, a MacVicar Faculty Fellow, Bose Research Fellow, and Fellow of the Optical Society of America and IEEE; he previously worked at HP Labs developing LED technologies.

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Lisa Cummins Dulchinos earned a bachelor's degree from UC Santa Barbara and an MBA from Saint Mary's College of California. Prior to joining Ayar Labs, she served as CFO at Penguin Computing, where she oversaw its successful sale, and as CFO at Omron Adept Technologies; she has held board roles in public and non-profit sectors.

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Sejal Patel Daswani earned a dual MBA/MPA from MIT Sloan School of Management and Harvard University, as well as degrees in biology and international affairs from Columbia University. Prior to joining Ayar Labs in 2026, she served as Chief People Officer at Deputy and as Chief Human Resources Officer at Sunrun, where she supported growth from 4,000 to 14,000 employees and contributed to the $3.2 billion acquisition of Vivint Solar; she previously held senior roles at Visa and Pfizer and advises venture firms and PeopleTech Partners.

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Vivek Gupta brings over two decades of experience in business strategy, commercialization, and product innovation. He previously held executive roles at Google, Qualcomm, and Atheros, where he built relationships and drove adoption of emerging compute architectures in complex technology markets.

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Scott Clark has extensive experience in global supply chain management, procurement, operations, and manufacturing transformations. He most recently served as Vice President of Supply Chain at Corsair Gaming and held senior leadership roles at Allied Telesis, Stratalight Communications (acquired by OpNext), Arecont Vision, AOptix Technologies, and Tascent, with significant work in the optical market and extended periods based in Asia. He holds a BS in Computer Science from the University of Maryland Global Campus.

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Matthew Gloss previously served as Chief Operating Officer, Corporate Secretary, and Chief Legal Officer at Belle.ai, contributing to digital engagement initiatives. He is an established attorney with experience guiding private-to-public company transitions and holds a degree from The Wharton School.

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Vivek Khanzodé brings more than 30 years of semiconductor engineering leadership experience. He previously led pre- and post-silicon validation for products that shipped in the hundreds of millions annually at Marvell Technology, Inc.

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Jesse Leiter previously held managing director and equity research roles at Jefferies, Deutsche Bank, and J.P. Morgan. He holds a BA in China in the Global Economy and Economics from Hobart and William Smith Colleges and studied Mandarin Chinese at Peking University.

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Garth Thompson previously served as Chief Digital Officer and SVP of Global Support and Services at Penguin Computing. He has held senior technical and leadership roles at OpSource and Oracle, specializing in IT infrastructure and support management.

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Sankara Venkateswaran has more than 26 years of experience delivering mobile, compute, networking, and infrastructure silicon products. He previously served as Vice President of Foundational Networking Silicon Engineering at Intel, leading global teams on Ethernet controllers and networking SoCs, and held engineering and leadership roles at Atheros and Qualcomm.

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Ayar Labs’ CPO solution integrates TeraPHY optical engines and SuperNova light sources to deliver in-package optical interconnects for AI scale-up fabrics, enabling thousands of GPUs across racks to function as a unified cluster with 5-10x higher bandwidth, 10x lower latency, and 4-8x better power efficiency than pluggable optics plus electrical SerDes. It replaces copper interconnect limitations in hyperscale AI infrastructure, supporting protocol-agnostic connectivity from millimeters to kilometers while fitting standard manufacturing and packaging flows used by XPU and switch vendors. The solution is standards-based, compliant with UCIe for electrical interfaces and CW-WDM MSA for light sources, and optimized for both training and inference workloads in disaggregated or composable architectures. Following the March 2026 $500 million Series E round that brought total funding to $870 million and valuation to approximately $3.75 billion, the company is scaling high-volume production and test capacity to support customer volume ramps targeted for the 2027-2028 timeframe. Ecosystem integrations include the June 2026 joining of the NVIDIA NVLink Fusion ecosystem for rack-scale AI infrastructure and the March 2026 collaboration with Wiwynn to deliver optically connected rack-scale systems, with demonstrations at events such as OFC 2026 and Computex 2026. Structural advantages include reliance on mature CMOS processes and multi-vendor semiconductor partnerships, reducing key-person or single-supplier risks while aligning with hyperscaler demands for power-efficient scaling.

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TeraPHY™ is an industry-first UCIe-compliant optical I/O chiplet that combines silicon photonics with standard CMOS manufacturing processes to provide a compact, low-power alternative to copper backplane and pluggable optics for chip-to-chip and package-to-package connectivity. The latest generation delivers up to 8 Tbps bi-directional bandwidth (with configurations supporting 4 Tbps per chiplet in prior descriptions) across 8 full-duplex optical ports using 16 WDM transceiver slices per port, achieving sub-10 ns latency per chiplet (excluding fiber time-of-flight) and BER <1e-12 with NRZ modulation and no required FEC. It integrates directly into existing multi-chip package architectures via standard form factors and flows, enabling flexible mapping through a configurable crossbar while supporting reaches from millimeters to kilometers. As the core engine of Ayar Labs’ CPO solution, TeraPHY has been validated across multiple generations with extensive reliability testing and is production-ready for hyperscale AI demands, with third-generation details presented at OFC 2025 and Hot Chips 2025. It pairs with external light sources to drive multi-terabit throughput from GPUs, CPUs, or accelerators, supporting ecosystem standards like AIB and upcoming UCIe compatibility. Structural durability stems from its use of mature process nodes (e.g., GlobalFoundries 45SPCLO) and compatibility with major semiconductor packaging ecosystems, positioning it for long-term adoption independent of single-customer cycles.

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SuperNova™ is a multi-wavelength external light source (ELS) in the industry-standard ELSFP form factor that provides up to 16 wavelengths of light delivered into 16 fibers, powering up to 16 ports and enabling up to 16 Tbps bi-directional bandwidth (supplying 256 optical carriers) when paired with TeraPHY chiplets. It is the industry’s first CW-WDM MSA-compliant 16-wavelength source, designed for compact packaging, wide temperature operation, field replaceability, and GR-468 reliability compliance to meet hyperscale deployment needs including liquid-cooled, high-density rack environments. The disaggregated design simplifies packaging costs through multi-wavelength arrays and offers platform flexibility for AI, HPC, optical computing, and high-density CPO applications. Recent validations include integration into liquid-cooled ELSFP board designs with Wiwynn, demonstrated at Computex 2026 and highlighted in June 2026 updates as production-ready for thermal, mechanical, and vibration demands. It forms the backbone of Ayar Labs’ complete optical I/O solution, supporting the shift from proof-of-concept to manufacturable systems. Durability factors include standardization via CW-WDM MSA and compatibility with multiple laser suppliers, reducing dependence on proprietary components while aligning with long-term hyperscaler infrastructure investments.

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Ranovus develops monolithic electro-photonic integrated circuit (EPIC) optical engines under the Odin brand specifically for co-packaged optics (CPO) deployments in AI/ML accelerators and switches. Its solutions target the same hyperscale AI buyers seeking to replace copper or pluggable interconnects with high-radix, multi-terabit optical links that extend scale-up clusters beyond single racks while improving power efficiency and density. The company integrates proprietary quantum dot lasers, modulators, drivers, and photodetectors on a single chip, enabling claimed advantages in shoreline density, power per bit, and simplified assembly versus hybrid approaches. Ranovus maintains an end-to-end model spanning silicon photonics design, foundry collaboration, advanced packaging, and OSAT integration to support volume production with global partners. Structural strengths include demonstrated multi-Tbps engines with Ethernet and DWDM compatibility, Tier-1 customer validations, and a co-development business model suited to large AI deployments. Execution risks center on scaling monolithic integration yields and supply chain reliability, common to the nascent CPO sector. Its focused pure-play positioning in optical engines for compute fabrics creates direct product and roadmap overlap with Ayar Labs' TeraPHY and SuperNova offerings.

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POET Technologies develops optical interposer platforms and integrated optical engines for high-density connectivity in AI networks and co-packaged optics (CPO) applications. The technology enables wafer-scale integration of light sources, modulators, and other photonic functions with electronics, targeting the same hyperscale AI and data center buyers addressing data movement bottlenecks in scale-up GPU clusters. POET's approach emphasizes semiconductor-style manufacturing to reduce packaging costs, improve yields, and support multi-terabit-per-second roadmaps through partnerships such as with Quantum Computing Inc. for 3.2 Tbps engines. Structural advantages include compatibility with both pluggable and CPO/NPO form factors, demonstrated 800G/1.6T modules, and an open ecosystem model that facilitates adoption by module makers and hyperscalers seeking supply chain alternatives. The company maintains a pure-play focus on photonic integration solutions, with manufacturing agreements supporting volume scaling. Execution depends on customer design wins and commercialization timelines amid competition in silicon photonics integration. Its positioning in wafer-level optical engines creates strong overlap with Ayar Labs in target use cases for AI optical I/O and CPO deployments.

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Lightmatter develops the Passage photonic interconnect platform, including CPO chiplets and engines, to deliver high-density optical I/O for AI supercomputers and data-center fabrics. The solutions enable the same chip-to-chip and rack-scale data movement for AI workloads as Ayar Labs, leveraging 3D-stacked silicon photonics, DWDM, and edgeless waveguide architectures for multi-terabit-per-fiber performance and bidirectional scaling. Passage supports pluggable to co-packaged form factors with claimed record bandwidth density and power efficiency, positioning it for integration with XPUs and switches in hyperscale environments. Structural advantages include a broader photonic computing ecosystem that combines interconnects with compute elements, plus demonstrated sampling of high-bandwidth variants like L-Series engines. The company's roadmap emphasizes pervasive optical connectivity to break shoreline and reticle limits in large AI clusters. Execution depends on advanced packaging yields and customer design wins amid competition from specialized CPO providers. Its hybrid compute-interconnect model offers both competitive pressure and potential complementarity in the optical AI infrastructure layer.

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Marvell's Photonic Fabric platform, originating from Celestial AI, provides optical interconnect chiplets and fabrics purpose-built for high-bandwidth, low-latency scale-up connectivity across large AI compute and memory clusters. It targets the identical buyer set of AI accelerator vendors and hyperscalers seeking to overcome electrical interconnect limits in training and inference workloads through disaggregated, optically connected architectures. The technology integrates electrical and optical components into compact chiplets that deliver optical connectivity directly to compute points, offering structural benefits in bandwidth density and power efficiency for multi-rack deployments. Following Marvell's acquisition of Celestial AI, the platform integrates into a broader data-center semiconductor portfolio, providing manufacturing scale and ecosystem leverage not available to standalone startups. Strengths include proven focus on AI-specific optical fabrics with substantial prior funding traction and hyperscaler collaborations. Integration complexity and competition from pure-play CPO solutions represent ongoing challenges. The combination creates durable positioning in end-to-end optical scale-up solutions that directly overlaps Ayar Labs' rack-scale ambitions.

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Credo, through its DustPhotonics acquisition, supplies silicon photonics photonic integrated circuits (PICs) optimized for high-speed optical transceivers and co-packaged/near-packaged optics (CPO/NPO) in AI data centers. The portfolio spans 400G to 3.2T with roadmaps supporting the multi-terabit demands of AI clusters, directly overlapping Ayar Labs in enabling optical connectivity for scale-up and scale-out networks. Monolithic or integrated SiPho designs reduce component count and improve yields for hyperscale deployments, with structural benefits in cost and reliability as port speeds increase. Post-acquisition, the technology folds into Credo's SerDes, DSP, and system-integration stack, enhancing vertical capabilities for electrical-optical interconnect solutions across AI infrastructure. Strengths include proven deployments in leading hyperscale AI clusters and a clear path to higher speeds via in-house PIC control. Challenges involve competing in a crowded silicon photonics space while achieving the integration levels needed for true CPO adoption. The combined entity provides durable manufacturing and go-to-market scale that pure-play optical I/O vendors must match through partnerships.

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Ayar Labs is allocating its March 2026 $500 million Series E round specifically to scale high-volume production and test capacity for its TeraPHY optical engines and SuperNova light sources, indicating the company has not yet achieved that scale despite years of development and prior funding. As of December 2024 the company had shipped only approximately 15,000 units to select customers, a volume that remains negligible relative to the multi-rack AI deployments it targets. Commercial CPO deployment discussions with partners explicitly reference timelines from 2026 through 2028 for transitioning from prototypes to manufacturable systems, exposing the company to any delays in wafer processing, packaging, thermal validation, or supply-chain qualification that could cause it to miss hyperscaler design-in windows. The TeraPHY chiplet relies on standard semiconductor manufacturing flows in partnership with GlobalFoundries and TSMC ecosystem players such as Alchip, yet the company opened a new Hsinchu, Taiwan office in 2025 precisely to support this ramp, underscoring the execution complexity ahead. Without concrete, citable multi-year volume commitments or qualified high-volume production milestones beyond engineering validation tests completed in 2025, the risk of schedule slippage remains unmitigated by disclosed buffers.

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Ayar Labs continues to describe its solution as production-ready and has secured strategic investments and partnerships with NVIDIA (including its June 2026 NVLink Fusion ecosystem integration), AMD, Alchip, GUC, and Wiwynn, yet public disclosures reveal no named hyperscale customers or design wins with Microsoft, Google, Amazon, or Meta. Shipments remained at the low-thousands scale into late 2024, and the company’s March 2026 funding announcement emphasizes acceleration of deployment rather than existing volume revenue. Partnerships address integration challenges such as fiber management, thermal management, and rack-level manufacturability, but the explicit focus on 2026–2028 commercial timelines signals that hyperscalers have not yet committed at scale. The absence of disclosed long-term supply agreements or revenue-generating contracts leaves the company exposed to the possibility that customers continue to rely on pluggable optics or copper interconnects longer than anticipated. No offsetting named volume commitments or diversified customer base beyond ecosystem partners can be cited from current sources.

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Ayar Labs competes directly with other silicon photonics startups including Lightmatter and Celestial AI, which are advancing photonic interconnect and fabric technologies targeted at the same AI scale-up bottleneck, while also facing potential in-house optical or advanced electrical solutions from its strategic investors NVIDIA, AMD, and Intel. The company’s focus on UCIe-compliant optical chiplets and CW-WDM MSA-compliant light sources positions it in a crowded field where differentiation rests on integration ease and power efficiency, yet competitors have announced their own roadmaps with comparable or greater funding in some cases. Continued improvement in pluggable optics or copper SerDes could delay or reduce the addressable market for co-packaged optics. Ecosystem partnerships with NVIDIA’s NVLink Fusion and ASIC houses provide validation, but do not preclude those same partners from developing parallel or alternative approaches. No citable evidence of exclusive design wins or superior performance benchmarks against named competitors is available to offset the structural competitive pressure.

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Ayar Labs’ TeraPHY manufacturing depends on GlobalFoundries and the TSMC ecosystem through partners Alchip and GUC, while the company expanded operations with a new Hsinchu, Taiwan office in 2025 to support scaling. This creates structural exposure to Taiwan-centric supply-chain disruptions, export controls, or geopolitical tensions that could affect wafer availability, advanced packaging, or laser sourcing for the SuperNova module. Strategic investments from AMD, MediaTek, and Alchip deepen ecosystem alignment but also concentrate reliance on a limited set of Asian and U.S. semiconductor players whose own roadmaps or capacity constraints could indirectly constrain Ayar Labs. The March 2026 funding round explicitly funds global operations expansion, yet the underlying geographic concentration of critical manufacturing steps remains unchanged. No diversified, multi-region qualified foundry network or long-term capacity reservations beyond existing partnerships can be verified from public sources to mitigate this exposure.

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Ayar Labs was founded in 2015 by Mark Wade, Vladimir Stojanovic, and other academics from MIT and UC Berkeley, with Wade serving as CEO since December 2023 and Stojanovic as CTO; both remain central to technology direction and scaling execution at the critical juncture of moving from low-volume shipments to high-volume production. The company’s technology leadership rests on proprietary microring resonator designs and integration know-how developed over more than a decade by this founding team. At a $3.75 billion valuation with ~233 employees as of May 2026 and a mandate to ramp manufacturing globally, any disruption in founder involvement could materially slow roadmap execution or partnership momentum. While the board includes experienced directors and recent hires such as the June 2026 appointment of Sejal Patel Daswani as Chief People and Operations Officer have been made, no public succession plans or broad management bench strength disclosures exist to offset the concentrated dependence on the two co-founders for the next phase of commercialization.

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Multiple independent voices highlight Ayar Labs' investor and partnership roster—including NVIDIA, AMD, Intel Capital, and recent Wiwynn collaboration for liquid-cooled hyperscale racks serving Microsoft, Amazon, Google, Meta, and Oracle—as concrete evidence of design traction and supply-chain positioning in the CPO ecosystem. Analysts and investors on X note Ayar joining the NVIDIA NVLink Fusion ecosystem and using Sivers InP lasers in SuperNova/TeraPHY as confirmation that volume ramps are materializing for 2027 rather than remaining theoretical. This view carries weight among AI-infrastructure investors who track ecosystem announcements closely, as the caliber of backers is seen as de-risking execution beyond typical startup milestones.

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Dylan Patel of SemiAnalysis and Ian Cutress of TechTechPotato/More Than Moore have each delivered substantive, multi-page or interview-based takes praising Ayar’s TeraPHY chiplets and micro-ring modulators for delivering ~5 pJ/bit efficiency, high density (2 Tbps per small die), lower latency NRZ, and composable scale-up architectures that address the IO power wall in AI clusters. These analyses contrast the approach favorably with traditional electrical SerDes or pluggable optics, emphasizing UCIe compatibility and disaggregated lasers as practical advantages for hyperscale deployment. The view recurs among photonics-focused analysts who have examined the silicon-photonics process details and system-level implications.

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fibeReality’s Mark Lutkowitz has argued in LinkedIn commentary that while big-tech acceptance exists, a large near-term business case for true chip-to-chip optical interconnects remains questionable; NVIDIA continues scaling effectively with pluggables, CPO faces a 10-year timeline to consequential volume, and Ayar’s ambitious combination of micro-rings, comb lasers, and silicon photonics risks being “a bridge too far.” This minority but technically grounded view stands in contrast to more bullish ecosystem takes and is attributed specifically to an optics-industry analyst with a track record of scrutinizing CPO timelines.

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Investor and analyst commentary on X and in coverage of the March 2026 $500M Series E and subsequent Wiwynn rack-scale ELSFP validation frames these as evidence that Ayar has moved beyond lab demos to manufacturable, serviceable architectures suitable for liquid-cooled hyperscale environments. Voices tracking the CPO supply chain cite the external light source work and UCIe optical engine as tangible progress toward the “how do we deploy millions reliably” phase rather than the earlier “will external sources be needed” debate.

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